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CYW150
........................ Document #: 38-07177 Rev. *B Page 9 of 14
Absolute Maximum Ratings[3]
Stresses greater than those listed in this table may cause
permanent damage to the device. These represent a stress
rating only. Operation of the device at these or any other condi-
tions above those specified in the operating sections of this
specification is not implied. Maximum conditions for extended
periods may affect reliability.
Parameter
Description
Rating
Unit
VDD, VIN
Voltage on any pin with respect to GND
–0.5 to +7.0
V
TSTG
Storage Temperature
–65 to +150
°C
TB
Ambient Temperature under Bias
–55 to +125
°C
TA
Operating Temperature
0 to +70
°C
ESDPROT
Input ESD Protection
2 (min)
kV
DC Electrical Characteristics (TA = 0°C to +70°C; VDDQ3 = 3.3V ±5%; VDDQ2 = 2.5V ±5%)
Parameter
Description
Test Condition
Min.
Typ.
Max.
Unit
Supply Current
IDD
3.3V Supply Current
CPU_F, 1:2= 100 MHz
Outputs Loaded[4]
320
mA
IDD
2.5V Supply Current
CPU_F, 1:2= 100 MHz
Outputs Loaded[4]
40
mA
Logic Inputs
VIL
Input Low Voltage
GND – 0.3
0.8
V
VIH
Input High Voltage
2.0
VDD + 0.3
V
IIL
Input Low Current[5]
–25
A
IIH
Input High Current[5]
10
A
IIL
Input Low Current (SEL100/66#)
–5
A
IIH
Input High Current (SEL100/66#)
+5
A
Clock Outputs
VOL
Output Low Voltage
IOL = 1 mA
50
mV
VOH
Output High Voltage
IOH = 1 mA
3.1
V
VOH
Output High Voltage
CPU_F, 1:2, IOAPIC IOH = –1 mA
2.2
V
IOL
Output Low Current
CPU_F, 1:2
VOL = 1.25V
60
73
85
mA
PCI_F, PCI1:5
VOL = 1.5V
96
110
130
mA
IOAPIC0, IOAPIC_F VOL = 1.25V
72
92
110
mA
REF0:1
VOL = 1.5V
61
71
80
mA
48-MHz
VOL = 1.5V
60
70
80
mA
24-MHz
VOL = 1.5V
60
70
80
mA
SDRAM0:15, _F
VOL = 1.5V
95
110
130
IOH
Output High Current
CPU_F, 1:2
VOH = 1.25V
43
60
80
mA
PCI_F, PCI1:5
VOH = 1.5V
76
96
120
mA
IOAPIC
VOH = 1.25V
60
90
130
mA
REF0:1
VOH = 1.5V
50
60
72
mA
48-MHz
VOH = 1.5V
50
60
72
mA
24-MHz
VOH = 1.5V
50
60
72
mA
SDRAM0:15, _F
VOH = 1.5V
75
95
120
Notes:
3. Multiple Supplies: The voltage on any input or I/O pin cannot exceed the power pin during power-up. Power supply sequencing is NOT required.
4. All clock outputs loaded with 6" 60
traces with 22-pF capacitors.
5. CYW150 logic inputs have internal pull-up devices (not to full CMOS level). Logic input FS3 has an internal pull-down device.
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